NEOCODE

Registers and Shift Registers MCQs

1. Basics of Registers

1.1 A register is primarily used to:

Correct Answer: a) Store data temporarily

Explanation:
Registers are small, fast storage locations within the CPU used to temporarily hold data being processed. While some registers may assist in operations, their primary purpose is temporary storage.

1.2 A register consists of a group of:

Correct Answer: a) Flip-flops

Explanation:
Each bit in a register is stored in a flip-flop. An n-bit register contains n flip-flops, one for each bit of storage.

1.3 How many flip-flops are required to store an 8-bit data in a register?

Correct Answer: c) 8

Explanation:
Each flip-flop stores one bit of information. Therefore, an 8-bit register requires 8 flip-flops.

1.4 Which of the following is NOT a type of register?

Correct Answer: d) ALU register

Explanation:
While the ALU (Arithmetic Logic Unit) uses registers (like the accumulator), "ALU register" is not a standard classification of register types.

1.5 Which register is used to store intermediate results in a CPU?

Correct Answer: b) Accumulator

Explanation:
The accumulator is a special register that stores intermediate arithmetic and logic results in a CPU.

2. Types of Shift Registers

2.1 A shift register is primarily used to:

Correct Answer: b) Shift data bits in a sequence

Explanation:
Shift registers are designed to move (shift) bits in a left or right direction, enabling serial-to-parallel or parallel-to-serial conversion.

2.2 Which of the following is NOT a type of shift register?

Correct Answer: d) Flip-Flop Shift Register (FFSR)

Explanation:
While shift registers are made of flip-flops, "FFSR" is not a standard classification. The standard types are SISO, SIPO, PISO, and PIPO.

2.3 How many clock pulses are required to shift a 4-bit data in a 4-bit shift register?

Correct Answer: d) 4

Explanation:
Each clock pulse shifts the data by one bit position. For a 4-bit register, 4 pulses are needed to completely shift all bits through the register.

2.4 A 4-bit shift register initially stores 1010. After one right shift operation, the stored value will be:

Correct Answer: a) 0101

Explanation:
Right shift moves all bits one position to the right. The MSB becomes 0 (assuming no input), and the LSB is lost. 1010 → 0101.

2.5 Which shift register allows input bits to be entered simultaneously in all stages?

Correct Answer: c) PIPO

Explanation:
Parallel-In Parallel-Out (PIPO) registers allow all bits to be loaded simultaneously through parallel inputs and read simultaneously through parallel outputs.

3. Operations of Shift Registers

3.1 The shift register which transfers data in both directions is called:

Correct Answer: b) Universal shift register

Explanation:
Universal shift registers can shift data both left and right, and can perform parallel loading, making them the most versatile type.

3.2 What is the output of a left shift operation on 0110 in a 4-bit shift register?

Correct Answer: b) 1100

Explanation:
Left shift moves all bits one position left. The LSB becomes 0 (assuming no input), and the MSB is lost. 0110 → 1100.

3.3 Which IC is commonly used as a shift register?

Correct Answer: b) 74164

Explanation:
The 74164 is an 8-bit serial-in/parallel-out shift register. The 7490 is a decade counter, 74138 is a decoder, and 7474 is a dual D flip-flop.

3.4 Which of the following registers is best suited for serial-to-parallel conversion?

Correct Answer: b) SIPO

Explanation:
Serial-In Parallel-Out (SIPO) registers accept data serially (one bit at a time) and make all bits available simultaneously at parallel outputs.

3.5 A 4-bit PISO shift register initially holds 1101. If three shift operations are performed, what will be the final output sequence?

Correct Answer: c) 0001

Explanation:
For PISO (assuming serial output right): Initial=1101 → After 1st shift: 101x → After 2nd shift: 01xx → After 3rd shift: 1xxx (where x=0 typically). The last bit remaining is 1, with leading zeros.

4. Timing and Performance Analysis

4.1 A 4-bit shift register operates at a clock frequency of 2 MHz. How long does it take to completely shift a 4-bit word?

Correct Answer: c) 2 µs

Explanation:
Clock period = 1/2 MHz = 0.5 µs. For 4-bit shift: 4 × 0.5 µs = 2 µs. Each shift operation takes one clock cycle.

4.2 A 8-bit shift register has a propagation delay of 20 ns per flip-flop. What is the total delay in shifting an 8-bit word?

Correct Answer: b) 160 ns

Explanation:
Total delay = number of bits × delay per bit = 8 × 20 ns = 160 ns. This is the time for a bit to propagate through all stages.

4.3 An 8-bit serial-in shift register is loaded with data at a rate of 1 Mbps. How long will it take to load a full 8-bit word?

Correct Answer: d) 8 µs

Explanation:
At 1 Mbps, each bit takes 1 µs (1/1 MHz). For 8 bits: 8 × 1 µs = 8 µs total loading time.

5. Complex Shift Register Operations

5.1 If a 5-bit ring counter is initialized with 10000, what will be the sequence after 4 clock pulses?

Correct Answer: b) 10000 → 01000 → 00100 → 00010

Explanation:
In a ring counter, the single '1' circulates: 10000 → 01000 → 00100 → 00010 → 00001 → 10000...

5.2 A 4-bit Johnson counter initially holds 0000. What will be its sequence after 6 clock pulses?

Correct Answer: a) 0001 → 0011 → 0111 → 1110 → 1100 → 1000

Explanation:
Johnson counter sequence: 0000 → 0001 → 0011 → 0111 → 1111 → 1110 → 1100 → 1000 → 0000 (8 states total). After 6 pulses: reaches 1000.